The Event Controlled Systems (ECS) Methodology is a new asynchronous design approach being developed at the University of Adelaide.
Crazy & Offbeat Pictures of the crew
These pages are under construction (semi-permanently). Please be patient.
The mess below is Sam's desk, with a PC there for no reason whatsoever. The bookcase holds publications, reports, books and stuff all related to asynchronous systems and VLSI. Behind the partition is the test lab, although it may soon move.
An annoying picture of Sam pointing at his terminal. The pressure of implementing ECSTAC is clearly showing.
The best test gear we've got - this is a 1.2Gs/2Gs Digital Aquisition System by Tektronix. It can be used to test TTL, ECL and CMOS parts at very high speeds. We've used it to test our chips. We also have a 5Gs digital sampling CRO from LeCroy, a whole bunch of 100MHz CROs, and all the support gear.
This is a shot of the test bench. Presently it's still holding systems that Sam though would circumvent the metastability problem in certain asynchronous systems entirely - he was wrong.
This is a picture of part of the VLSI lab. It has all the hooooopy workstations and disks that our data and programs are stored on. Theres a SPARC 10, SPARC 5 and a bunch of IPCs and xterms, as well as a PowerMac and a PC.
The Vision Lab is for the Insect Vision project - they have very nice equipment that we can use if we ask nicely. There are two SPARC 20s and a SPARC 5, two powerful PCs, a colour postscript printer on the net, and you can see the LeCroy CRO above the second SUN machine.
This is the Signal Processing Lab. They have lots of Alphas and Suns, and heaps of xterms. They do really cools stuff with algorithms.
A gratuitous picture of the bike I ride to Uni. Nice, huh!
The ECS pages were last updated on 1 May 1995
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