The Event Controlled Systems (ECS) Methodology is a new asynchronous design approach being developed at the University of Adelaide. It generally employs a two-phase signalling framework and a bounded-delay gate timing model. We have demonstrated superior performance to traditional two and four phase approaches in CMOS.
These pages are under construction (semi-permanently). Please be patient.
Our new paper debunks the myth that four-phase performance is better than two-phase performance.
We have a Gentle Introduction to the project for those unfamiliar with asynchronous logic.
Detailed information regarding the ECS project concerns...
The ECS project is looking for a postgraduate student.
ECSTAC is back and ready to rock!!!
Go to Departmental HomePage Interesting Material What's New?
ECSTAC is back, and testing is commencing! Stay tuned for developments!
Comments and requests can be sent to firstname.lastname@example.org