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CHiPTec Technical Reports: Sam S. Appleton
Internal reports
  1. Sam S. Appleton. Test Board Setup for the ECSTAC Microprocessor Device. CHiPTec Tech. Rep. HPCA-ECS-97-01, The University of Adelaide, January 1997.


  2. Sam Appleton. Asynchronous Pipeline Design using GaAs PDLL Logic and new CMOS dynamic techniques. CHiPTec Tech. Rep. HPCA-ECS-96-04, The University of Adelaide, October 1996.


  3. Sam Appleton. Implementation of Instruction and Data Caches for the ECSTAC Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-96-02, The University of Adelaide, June 1996.


  4. Sam S. Appleton, Shannon V. Morton, and Michael J. Liebelt. Instruction and Data Caches for the ECSTAC-P Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-95-04, The University of Adelaide, February 1995.


  5. Shannon V. Morton and Sam S. Appleton. Deadlock and Persistency Detection of Temporal Specifications. CHiPTec Tech. Rep. HPCA-ECS-95-02, The University of Adelaide, January 1995.


  6. Sam S. Appleton, Shannon V. Morton, Andrew B. Johnson, and Michael J. Liebelt. ECSTACBus: External Bus Protocol for the ECSTAC Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-94-03, The University of Adelaide, 1994.


  7. Sam S. Appleton, Shannon V. Morton, Andrew B. Johnson, and Michael J. Liebelt. Instruction Set Architecture of ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-01, The University of Adelaide, 1994.


  8. Sam S. Appleton, Shannon V. Morton, and Michael J. Liebelt. Instruction and Data Caches for the ECSTAC Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-94-07, The University of Adelaide, 1994.


  9. Sam S. Appleton, Shannon V. Morton, and Michael J. Liebelt. Metastability in ECS Systems. CHiPTec Tech. Rep. HPCA-ECS-94-18, The University of Adelaide, 1994.


  10. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. 24 Bit Adder, Comparator and Stack Access Stages for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-05, The University of Adelaide, 1994.


  11. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Instruction Decode and Operand Fetch Process for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-02, The University of Adelaide, 1994.


  12. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Interface to the Execution Units and the ALU and PC Structures for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-06, The University of Adelaide, 1994.


  13. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Register Control, Tags and Write Back Strategies for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-04, The University of Adelaide, 1994.


  14. Sam S. Appleton and Shannon V. Morton. A Pipelined ECS Cache Design. CHiPTec Tech. Rep. HPCA-ECS-93-17, The University of Adelaide, December 1993.


  15. Sam S. Appleton and Shannon V. Morton. Implementation of an ECS SRAM. CHiPTec Tech. Rep. HPCA-ECS-93-15, The University of Adelaide, November 1993.


  16. Sam S. Appleton and Shannon V. Morton. Petri Nets applied to the ECS Methodology. CHiPTec Tech. Rep. HPCA-ECS-93-14, The University of Adelaide, November 1993.


  17. Sam S. Appleton, Shannon V. Morton, M. J. Liebelt, and D. A. Pucknell. Design of a controller for an event controlled cache system. CHiPTec Tech. Rep. HPCA-ECS-93-07, The University of Adelaide, June 1993.


  18. Shannon V. Morton and Sam S. Appleton. ECS Compilation Techniques - Translation of Linear Code into Temporal Specifications. CHiPTec Tech. Rep. HPCA-ECS-93-18, The University of Adelaide, December 1993.


  19. Shannon V. Morton and Sam S. Appleton. ECS Compilation Techniques - Translation of Program Constructs into Temporal Specifications. CHiPTec Tech. Rep. HPCA-ECS-93-16, The University of Adelaide, November 1993.


  20. Shannon V. Morton and Sam S. Appleton. Event Controlled Systems - Techniques and Concepts. CHiPTec Tech. Rep. HPCA-ECS-93-05, The University of Adelaide, May 1993.


  21. Shannon V. Morton and Sam S. Appleton. Event Controlled Systems Design Methodology using a Temporal Specification Approach. CHiPTec Tech. Rep. HPCA-ECS-93-10, The University of Adelaide, September 1993.


  22. Shannon V. Morton and Sam S. Appleton. Temporal Transition Graphs for Event Controlled Systems. CHiPTec Tech. Rep. HPCA-ECS-93-12, The University of Adelaide, October 1993.


  23. Shannon V. Morton and Sam S. Appleton. The Design of a QR42 Interface using the ECS Methodology. CHiPTec Tech. Rep. HPCA-ECS-93-09, The University of Adelaide, August 1993.



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