1. Andrew Beaumont-Smith. MatRISC-1 Architecture Study and Design. CHiPTec Tech. Rep. CHIPTEC-99-02, The University of Adelaide, April 1999.



2. Andrew Beaumont-Smith. IP Organisation and Instruction Set Architecture for the MDMA. CHiPTec Tech. Rep. CHIPTEC-97-04, The University of Adelaide, February 1997.



3. Andrew Beaumont-Smith. MDMA Analysis. CHiPTec Tech. Rep. CHIPTEC-97-03, The University of Adelaide, February 1997.



4. Andrew Beaumont-Smith. Proposal for Research. CHiPTec Tech. Rep. CHIPTEC-97-05, The University of Adelaide, February 1997.



5. Andrew Beaumont-Smith. The Development of a MATRISC Processor. CHiPTec Tech. Rep. CHIPTEC-97-02, The University of Adelaide, February 1997.



6. Andrew Beaumont-Smith and Kiet To. Multi-Dimensional Memory Array on a Two Dimensional Processing Element Array. CHiPTec Tech. Rep. CHIPTEC-97-01, The University of Adelaide, January 1997.



7. Andrew Beaumont-Smith and Neil Burgess. Sub-nanosecond GaAs 32-bit Adder. CHiPTec Tech. Rep. CHIPTEC-96-01, The University of Adelaide, October 1996.



8. A. Beaumont-Smith and K. Eshraghian. Comparison of gallium arsenide MESFET process technologies. CHiPTec Tech. Rep. GaAs-92-14, The University of Adelaide, August 1992.



9. W. Marwood and A. Beaumont-Smith. The architecture and optimisation of systolic ring processors for matrix computations. CHiPTec Tech. Rep. GaAs-92-05, The University of Adelaide, March 1992.



10. A. Beaumont-Smith, W. Marwood, C.C. Lim, and K. Eshraghian. Ultra high speed gallium arsenide systems: design methodology, CAD tools and architectures. CHiPTec Tech. Rep. GaAs-91-01, The University of Adelaide, March 1991.



11. Andrew Beaumont-Smith. Gallium Arsenide Network Extractor GAASNET. CHiPTec Tech. Rep. GaAs-90-05, The University of Adelaide, December 1990.



12. Andrew Beaumont-Smith. Gallium Arsenide Tutorial Exercise EGAS - NOR Gate. CHiPTec Tech. Rep. GaAs-90-03, The University of Adelaide, July 1990.

1. Andrew Beaumont-Smith and Tse-Yu Yeh. Low-Power, High-Performance Architecture of the PWRficient Processor. CHiPTec Seminar CHIPTECSEM-07-01, PA SEMI, January 2007.

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