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CHiPTec Technical Reports: Michael J. Liebelt
Internal reports
  1. Michael Liebelt. A Proposal for Research on the Testability of Asynchronous Circuits. CHiPTec Tech. Rep. HPCA-ECS-96-01, The University of Adelaide, June 1996.


  2. Michael Liebelt and Neil Burgess. The Effects of Exitory Faults in Semi-modular Asynchronous Circuits. CHiPTec Tech. Rep. HPCA-ECS-96-03, The University of Adelaide, July 1996.


  3. Sam S. Appleton, Shannon V. Morton, and Michael J. Liebelt. Instruction and Data Caches for the ECSTAC-P Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-95-04, The University of Adelaide, February 1995.


  4. Michael Liebelt. Progress Report on Research on the Testing of Asynchronous Circuits. CHiPTec Tech. Rep. HPCA-ECS-95-03, The University of Adelaide, 1995.


  5. Sam S. Appleton, Shannon V. Morton, Andrew B. Johnson, and Michael J. Liebelt. ECSTACBus: External Bus Protocol for the ECSTAC Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-94-03, The University of Adelaide, 1994.


  6. Sam S. Appleton, Shannon V. Morton, Andrew B. Johnson, and Michael J. Liebelt. Instruction Set Architecture of ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-01, The University of Adelaide, 1994.


  7. Sam S. Appleton, Shannon V. Morton, and Michael J. Liebelt. Instruction and Data Caches for the ECSTAC Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-94-07, The University of Adelaide, 1994.


  8. Sam S. Appleton, Shannon V. Morton, and Michael J. Liebelt. Metastability in ECS Systems. CHiPTec Tech. Rep. HPCA-ECS-94-18, The University of Adelaide, 1994.


  9. S. Cui, M. J. Liebelt, K. Eshraghian, and N. Burgess. A Modified Ring Notation Approach for Implementation of a GaAs Core Processor for a Solid Modelling Accelerator. CHiPTec Tech. Rep. GaAs-94-02, The University of Adelaide, 1994.


  10. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. 24 Bit Adder, Comparator and Stack Access Stages for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-05, The University of Adelaide, 1994.


  11. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Instruction Decode and Operand Fetch Process for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-02, The University of Adelaide, 1994.


  12. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Interface to the Execution Units and the ALU and PC Structures for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-06, The University of Adelaide, 1994.


  13. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Register Control, Tags and Write Back Strategies for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-04, The University of Adelaide, 1994.


  14. Tim Shaw and Michael Liebelt. A Reliable Microprocessor Control Systems with Multiple Redundancy. CHiPTec Tech. Rep. HPCA-CRC-94-12, The University of Adelaide, 1994.


  15. Sam S. Appleton, Shannon V. Morton, M. J. Liebelt, and D. A. Pucknell. Design of a controller for an event controlled cache system. CHiPTec Tech. Rep. HPCA-ECS-93-07, The University of Adelaide, June 1993.


  16. S. Cui, M. J. Liebelt, and K. Eshraghian. Using unified technology to implement a solid modelling accelerator: project report I. CHiPTec Tech. Rep. GaAs-93-09, The University of Adelaide, July 1993.


  17. K. Eshraghian, M. K. McGeever, E. Chu, J. Jakobsen, and M.J. Liebelt. Implementation of an 8x8 B-ISDN ATM switch in gallium arsenide. CHiPTec Tech. Rep. GaAs-93-08b, The University of Adelaide, July 1993.



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