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CHiPTec Technical Reports: A. R. Moini
Internal reports
  1. A. Moini, A. Bouzerdoum, and K. Eshraghian. Statistical Analysis of the Accuracy of Current-Mirror Structure. CHiPTec Tech. Rep. GaAs-95-01, The University of Adelaide, March 1995.


  2. A. R. Moini. Bug-Eye II The Second Generation of a Motion Detection Chip. CHiPTec Tech. Rep. GaAs-94-03, The University of Adelaide, September 1994.


  3. K. Eshraghian and A. R. Moini. Interfacing and bus structure in GaAs design. CHiPTec Tech. Rep. GaAs-93-07a, The University of Adelaide, April 1993.


  4. K. Eshraghian and A. R. Moini. Packaging for very high speed VLSI. CHiPTec Tech. Rep. GaAs-93-04, The University of Adelaide, March 1993.


  5. X. T. Nguyen, R. Bogner, K. Eshraghian, D. Abbott, A. Bouzerdoum, A. Moini, and A. Yakovleff. Robotic micro-sensor based on insect vision. CHiPTec Tech. Rep. GaAs-93-05, The University of Adelaide, March 1993.


  6. X. T. Nguyen, R. E. Bogner, K. Eshraghian, A. Bouzerdoum, D. Abbott, A. Moini, and A. Yakovleff. Optical interfaces for the front-end visual processing system based upon insect vision. CHiPTec Tech. Rep. GaAs-93-07b, The University of Adelaide, June 1993.


  7. E. Chu, S. Cui, and A. R. Moini. The pseudo-current-mode logic familt (PCML). CHiPTec Tech. Rep. GaAs-92-06, The University of Adelaide, April 1992.


  8. S. Cui, E. Chu, and A. R. Moini. Source follower FET logic (SFFL). CHiPTec Tech. Rep. GaAs-92-07, The University of Adelaide, May 1992.


  9. K. Eshraghian, E. Chu, A. R. Moini, and S. Cui. Design and comparison of GaAs static logic suitable for VLSI implementation. CHiPTec Tech. Rep. GaAs-92-15, The University of Adelaide, November 1992.



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