1. D. Abbott, S. Cui, K. Eshraghian, and E. McCabe. Photovoltaic gate biasing edge effect in GaAs MESFETs. CHiPTec Tech. Rep. GaAs-91-11, The University of Adelaide, June 1991.



2. D. Abbott and K. Eshraghian. Gallium arsenide MESFET imager. CHiPTec Tech. Rep. GaAs-91-18, The University of Adelaide, 1991.



3. A. Beaumont-Smith, W. Marwood, C.C. Lim, and K. Eshraghian. Ultra high speed gallium arsenide systems: design methodology, CAD tools and architectures. CHiPTec Tech. Rep. GaAs-91-01, The University of Adelaide, March 1991.



4. K. Eshraghian, E. Bushehri, and R. Bayford. Characterization and performance analysis of gallium arsenide MESFET structures, using a new layout apporach. CHiPTec Tech. Rep. GaAs-91-13, The University of Adelaide, July 1991.



5. K. Eshraghian, E. Bushehri, and R. Bayford. Characterization and performance estimation of MESFET structures. CHiPTec Tech. Rep. GaAs-91-12, The University of Adelaide, July 1991.



6. K. Eshraghian, R. Sarmiento, P. P. Carballo, and A. Nunez. Speed-Area-Power optimization for DCFL and SDCFL class of logic using ring notation. CHiPTec Tech. Rep. GaAs-91-10, The University of Adelaide, May 1991.



7. R. Flay. Test vector generation for combinational logic circuits. CHiPTec Tech. Rep. GaAs-91-07, The University of Adelaide, May 1991.



8. C. C. Kong. Control logic and software for a high speed tester. CHiPTec Tech. Rep. GaAs-91-06, The University of Adelaide, May 1991.



9. N. Laycock. BiCMOS VLSI layout, design rule checking, and circuit extraction. CHiPTec Tech. Rep. GaAs-91-03, The University of Adelaide, May 1991.



10. W. Marwood. A generalized systolic array serial floating point adder and accumulator. CHiPTec Tech. Rep. GaAs-91-21, The University of Adelaide, July 1991.



11. W. Marwood. A generalized systolic ring serial floating point multiplier. CHiPTec Tech. Rep. GaAs-91-20, The University of Adelaide, July 1991.



12. W. Marwood. A number theory mapping generator for addressing matrix structures. CHiPTec Tech. Rep. GaAs-91-19, The University of Adelaide, July 1991.



13. S. Mosel. Ultra high speed graphics engine architecture and polynomial evaluator in gallium arsenide. CHiPTec Tech. Rep. GaAs-91-15, The University of Adelaide, October 1991.



14. V. Nomokonov and F. Filippov. Test pattern generation for combinational logic circuits: new method and algorithm. CHiPTec Tech. Rep. GaAs-91-02, The University of Adelaide, May 1991.



15. D. Silver. 1 GHz clock generator for a GaAs IC functional tester. CHiPTec Tech. Rep. GaAs-91-04, The University of Adelaide, May 1991.



16. M. Tang. Construction of matrices of paths for graph models of combinational circuits. CHiPTec Tech. Rep. GaAs-91-08, The University of Adelaide, May 1991.



17. J. Yeung. investigation of the ability of test sets to detect physical fault in combinational logic. CHiPTec Tech. Rep. GaAs-91-05, The University of Adelaide, May 1991.



18. N. S. Yusoff. Test set derivation for combinational logic circuits using matrices of paths. CHiPTec Tech. Rep. GaAs-91-09, The University of Adelaide, May 1991.

This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All person copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.

Les documents contenus dans ces répertoires sont rendus disponibles par les auteurs qui y ont contribué en vue d'assurer la diffusion à temps de travaux savants et techniques sur une base non-commerciale. Les droits de copie et autres droits sont gardés par les auteurs et par les détenteurs du copyright, en dépit du fait qu'ils présentent ici leurs travaux sous forme électronique. Les personnes copiant ces informations doivent adhérer aux termes et contraintes couverts par le copyright de chaque auteur. Ces travaux ne peuvent pas être rendus disponibles ailleurs sans la permission explicite du détenteur du copyright.

This document was translated from BibT_EX by bibtex2html