1. Sam S. Appleton, Shannon V. Morton, Andrew B. Johnson, and Michael J. Liebelt. ECSTACBus: External Bus Protocol for the ECSTAC Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-94-03, The University of Adelaide, 1994.



2. Sam S. Appleton, Shannon V. Morton, Andrew B. Johnson, and Michael J. Liebelt. Instruction Set Architecture of ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-01, The University of Adelaide, 1994.



3. Sam S. Appleton, Shannon V. Morton, and Michael J. Liebelt. Instruction and Data Caches for the ECSTAC Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-94-07, The University of Adelaide, 1994.



4. Sam S. Appleton, Shannon V. Morton, and Michael J. Liebelt. Metastability in ECS Systems. CHiPTec Tech. Rep. HPCA-ECS-94-18, The University of Adelaide, 1994.



5. Nicholas M. Betts. Code Document: 0: The Hewitt NURBS Package and Data Structure. CHiPTec Tech. Rep. HPCA-SME-94-02, The University of Adelaide, September 1994.



6. Nicholas M. Betts. Code Document: 1 NURBS Evaluation and Derivatives. CHiPTec Tech. Rep. HPCA-SME-94-03, The University of Adelaide, December 1994.



7. Nicholas M. Betts. Code Document: la Polynomial Evaluation. CHiPTec Tech. Rep. HPCA-SME-94-14, The University of Adelaide, December 1994.



8. Nicholas M. Betts. Research Proposal: Hardware Acceleration of Solid Modelling with Free Form Curves and Surfaces. CHiPTec Tech. Rep. HPCA-SME-94-01, The University of Adelaide, June 1994.



9. Nicholas M. Betts. Strategies for Hardware Evaluation of NURBS. CHiPTec Tech. Rep. HPCA-SME-95-01, The University of Adelaide, November 1994.



10. S. Cui, M. J. Liebelt, K. Eshraghian, and N. Burgess. A Modified Ring Notation Approach for Implementation of a GaAs Core Processor for a Solid Modelling Accelerator. CHiPTec Tech. Rep. GaAs-94-02, The University of Adelaide, 1994.



11. A. R. Moini. Bug-Eye II The Second Generation of a Motion Detection Chip. CHiPTec Tech. Rep. GaAs-94-03, The University of Adelaide, September 1994.



12. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. 24 Bit Adder, Comparator and Stack Access Stages for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-05, The University of Adelaide, 1994.



13. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Instruction Decode and Operand Fetch Process for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-02, The University of Adelaide, 1994.



14. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Interface to the Execution Units and the ALU and PC Structures for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-06, The University of Adelaide, 1994.



15. Shannon V. Morton, Sam S. Appleton, and Michael J. Liebelt. Register Control, Tags and Write Back Strategies for ECSTAC-P. CHiPTec Tech. Rep. HPCA-ECS-94-04, The University of Adelaide, 1994.



16. Tim Shaw and Michael Liebelt. A Reliable Microprocessor Control Systems with Multiple Redundancy. CHiPTec Tech. Rep. HPCA-CRC-94-12, The University of Adelaide, 1994.

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