1. Said F. Al-Sarawi and Derek Abbott. Review of 3D VLSI Packaging Technology. CHiPTec Tech. Rep. CHIPTEC-96-02, The University of Adelaide, December 1996.



2. Sam Appleton. Asynchronous Pipeline Design using GaAs PDLL Logic and new CMOS dynamic techniques. CHiPTec Tech. Rep. HPCA-ECS-96-04, The University of Adelaide, October 1996.



3. Sam Appleton. Implementation of Instruction and Data Caches for the ECSTAC Microprocessor. CHiPTec Tech. Rep. HPCA-ECS-96-02, The University of Adelaide, June 1996.



4. Andrew Beaumont-Smith and Neil Burgess. Sub-nanosecond GaAs 32-bit Adder. CHiPTec Tech. Rep. CHIPTEC-96-01, The University of Adelaide, October 1996.



5. Nicholas Betts. Design and Simulation of the MatRISC Load/Store Architecture. CHiPTec Tech. Rep. HPCA-MAT-96-03, The University of Adelaide, June 1996.



6. Nicholas Betts. Inverted Address Generation for a Matrix Processor. CHiPTec Tech. Rep. HPCA-MAT-96-01, The University of Adelaide, June 1996.



7. Nicholas Betts. Multiplication on the Load/Store Architecture. CHiPTec Tech. Rep. HPCA-MAT-96-02, The University of Adelaide, June 1996.



8. Michael Liebelt. A Proposal for Research on the Testability of Asynchronous Circuits. CHiPTec Tech. Rep. HPCA-ECS-96-01, The University of Adelaide, June 1996.



9. Michael Liebelt and Neil Burgess. The Effects of Exitory Faults in Semi-modular Asynchronous Circuits. CHiPTec Tech. Rep. HPCA-ECS-96-03, The University of Adelaide, July 1996.

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