Delay refers to the time required for a signal to travel between the functional circuit blocks in a system. In high speed systems, the total delay time is limited primarily by the time of flight, which is defined as the time taken for the signal to travel (fly) along the interconnect. The time of flight is directly proportional to the interconnect length. The requirement to minimise interconnect length, hence delay, is dramatically attained by a 3D approach, as shown in Figure . The resultant reduction in interconnect length, leads to smaller interconnect associated parasitic capacitance and inductance, hence reducing signal propagation delays. For example, the signal delay of MCMs over single packaging is reduced by about 300% . Furthermore, the delay is even less in case of 3D technology because the electronic components are in close proximity to each other.
Figure: A comparison between the wiring lengths in 2D and 3D structures. As can be seen the interconnection length can be reduced by a factor of 100-200 times.