Contents

• Introduction
  • Objective
  • Electronic Packaging
  • Interconnection Topology
  • Interconnection Implementation
    • Wire Bonding Interconnection
    • Tape-Automated Bonding
    • Solder Bump Bonding
  • Conventional Packaging Styles
  • Discussion
• MCM Packaging Technology
  • What is a Multi-Chip Module (MCM)?
  • MCM Architecture
  • MCM Technologies
  • Discussion
• 3D VLSI packaging Technology
  • Advantages of 3D Packaging Technology Over Conventional Technologies
    • Size and Weight
    • Silicon Efficiency
    • Interconnect Usability and Accessibility
    • Delay
    • Noise
    • Power Consumption
    • Speed
    • Interconnect Capacity
    • Interconnection Capacity Between Packaging Levels
  • Vertical Interconnections in 3D Electronics
    • Periphery Interconnection between Stacked ICs
      • Stacked Tape Carrier
      • Solder Edge Conductors
      • Thin Film Conductors on Face-of-a-Cube
      • An Interconnection Substrate Soldered to the Cube Face
      • Folded Flex Circuits
      • Wire Bonded Stacked Chips
    • Area Interconnection between Stacked ICs
      • Flip-chip Bonded Stacked Chips without Spacers
      • Flip-chip Bonded Stacked Chips with Spacers
      • Microbridge Springs and Thermomigration Vias
    • Periphery Interconnection between Stacked MCMs
      • Solder Edge Conductors
      • Thin Film Conductors on Face-of-a-Cube
      • A flip-chip bonded to faces of the stack
      • Blind Castellation Interconnection
    • Area Interconnection between Stacked MCMs
      • Arrays of Contacts between MCMs with through hole vias
  • Limitations of 3D Packaging Technology
    • Thermal Management
    • Design complexity
    • Cost
    • Time to Delivery
    • Design Software
  • Discussion
• Examples of 3D Packaging Technology
  • Texas Instrument - Aladdin Parallel Processor
  • Lockheed - Kill Vehicle Architecture
  • Irvine Sensors - 3D Smart Sensor
  • Thomson-CSF and University of Sheffield - Micro-Camera System
  • InterChip Systems, Inc. - 3 Case Studies
  • Texas Instruments - 1.2 Gbit Solid State Recorder
  • AT&T - 3D DSP
  • Harris - 3D Memories
  • AT&T Bell Lab. - COC DSP/SRAM
  • Fujitsu- A `GaAs on Si' PLL
  • Jet Propulsion Laboratory - Advanced Flight Computing
  • Raytheon - Floating Point Parallel Processor
• Technology Issues
  • Available Semiconductor Technologies
  • Assessment of Analog and Digital Systems Design and their Limitations
• Potential Collaborators
  • Irvine Sensors Corporation
  • Thomson-CFS
  • Harris Corporation
  • Texas Instruments
  • Raytheon
  • University of California, San Diego
• Conclusion
• References
• Glossary
• Collected Bibliography on 3D Packaging - 602652 Kbyte