The shift from conventional single chip packages to 3D technology, leads to substantial size and weight reductions. The main limiting factors for 3D technology are (i) the interconnection capacity (see subsection ), (ii) the thermal characteristics, and (iii) the required robustness. It has been reported that a 40-50 times reduction in size and weight is achievable using 3D technology compared to conventional packaging. As an example, volume and weight comparisons between Texas Instrument's 3D bare dice packaging, discrete and planar packaging (MCM) are presented in Tables and . It is evident from Table that a 5-6 times reduction in volume, over MCM technology, and a 10-20 times volume reduction, over discrete packaging technology, is possible. Moreover, a 2-13 times reduction in weight, compared to MCM technology, and a 3-19 times weight reduction, compared to discrete components, is also achievable. All of these reductions result from eliminating the overhead weight and size associated with conventional technologies.
Type | Capacity | Discrete | Planar | 3D | Discrete/3D | Planar/3D |
SRAM | 1 Mbit | 1678 | 783 | 133 | 12.6 | 5.9 |
4 Mbit | 872 | 249 | 41 | 21.3 | 6.1 | |
DRAM | 1 Mbit | 1357 | 441 | 88 | 15.4 | 5.0 |
4 Mbit | 608 | 179 | 31 | 19.6 | 5.0 | |
16 Mbit | 185 | 69 | 69 | 16.8 | 6.2 | |
Type | Capacity | Discrete | Planar | 3D | Discrete/3D | Planar/3D |
SRAM | 1 Mbit | 3538 | 2540 | 195 | 18.1 | 13.0 |
4 Mbit | 1588 | 862 | 145 | 10.9 | 5.9 | |
DRAM | 1 Mbit | 2313 | 1542 | 132 | 17.5 | 11.6 |
4 Mbit | 862 | 590 | 113 | 7.6 | 5.2 | |
16 Mbit | 363 | 227 | 113 | 3.2 | 2.0 | |