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Flip-chip Bonded Stacked Chips without Spacers

 

The stacked ICs are flipped and interconnected to either a substrate or another chip using the solder joint technology discussed in section gif. This technique was used by Fujitsu [24] for stacking a GaAs chip on a CMOS chip technology as illustrated in Fig. gif. (See also section gif).

   figure555
Figure: A schematic diagram of Fujitsu GaAs on Si PLL Frequency Synthesiser IC.


next up previous contents
Next: Flip-chip Bonded Stacked Chips Up: Area Interconnection between Stacked Previous: Area Interconnection between Stacked

Said F. Al-Sarawi,
Centre for High Performance Integrated Technologies and Systems (CHIPTEC),
Adelaide, SA 5005,
March 1997