HDI-thin film interconnect laminated to side of stack: The vertical interconnects are realised along the sides of the stack using the same HDI process used in the substrate. The sides are laminated then patterned using a chemical process called ``electroplated photoresist.'' A schematic diagram of this method is shown in Figure . This technique was developed and used by General Electric in the design of high density memories and other application specific integrated circuits (ASICs).
except that MCMs are used in the stack instead of ICs.