AT&T has built a three-chip multichip module consisting of an AT&T DSP-1610 digital signal processor chip and two 256K SRAM chips [41]. The SRAMs are directly flip-chip attached on the top of the DSP using an additional intermediate layer. The structure of the combined DSP and SRAM is shown in Figure 
. The resultant package still has an identical form factor to the original single chip DSP. The difference to the end user is that the module has 640K of internal memory, instead of 128K available in the single chip. The vertical interconnection technique is similar to the one discussed in section .
Figure: (left) Micrograph of the DSP, used in the AT&T demonstration, that contains 128K of cache memory. The hashed area indicates the footprint for stacking a 256K SRAM. (right) Micrograph of a 256K SRAM chip. The hashed area indicates the part of the chip that is occupied by actual memory cells. (Adapted from [41]).